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Intern, Logic Pathfinding Lab Research Scientist - DTCO

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Samsung Semiconductor

Nov 20, 2023

Applications are closed

  • Internship
    Full-time
    Off-cycle Internship
  • Design
  • San Francisco

Requirements

  • Graduate student enrolled in a Master or PhD program (either in US or abroad), in VLSI technology and design
  • Working experience on DTCO including standard cell design and layout synthesis
  • Proficient on programming
  • Good knowledge of device architecture beyond FinFET
  • You’re inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Responsibilities

  • Enable standard cell automation for MBC and 3D stacked devices
  • Develop / optimize std cell PPA evaluation flow for Samsung advanced technologies.
  • Develop and implement strategies for automation for standard cell library characterization, and LEF extraction for Samsung advanced technologies.
  • Collaborate closely with Samsung DTCO engineers
  • Collaborate with university or consortia researchers
  • Complete other responsibilities as assigned.
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Samsung Semiconductor

Manufacturing & Electronics
Industry
10,001+
Employees

Mission & Purpose

Established in 1974 as a subsidiary of Samsung Electronics, we’re proud to be recognized as one of the leading chip manufacturers in the world. Using our knowledge in semiconductor technology, our ambition is to spark the imagination of device manufacturers with top-of-the-line building blocks and, through that, enrich the lives of people around the world with transformative solutions.