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Senior HBM Foundry Interface Design Engineer

Applications are closed

  • Job
    Full-time
    Senior (5-8 years)
  • Folsom

Requirements

  • BSEE or greater
  • 5+ years of experience technically contributing in the relevant Design/Technology engineering roles.
  • Experience working with Foundry Technology PDKs preferably advanced FinFET nodes.
  • Experience working with EDA tools and EDA design automation etc. with experience in CMOS circuit design. Familiarity with the fundamental concepts associated with parasitic extraction, physical verification, circuit simulation, and reliability verification.
  • Understanding of compact device models and aging models is a plus.
  • Solid experience in automation using Python or equivalent scripting language is highly encouraged.
  • Good understanding of Process Technology and device physics of advanced CMOS device architecture (FinFET and GAA).
  • Good verbal and written communication skills with the ability to effectively synthesize and convey complex technical concepts to other partners and leadership.
  • Strong track record of innovation and problem-solving in high-performance memory development

Responsibilities

  • Focused, self-motivated semiconductor foundry interface engineer providing strategic and technical leadership across the semiconductor industry involving wafer foundries and fabless design houses.
  • Use foundry technology process design kits (PDKs) of advanced FinFET and GAA nodes to come up with design guidelines for power/performance optimization.
  • Study and analyze Foundry Technology to provide guidelines to design team to improve power/performance/area and reliability.
  • Participate in new architecture development for upcoming and future HBM base Die design through Design Technology Co-optimization involving std cells and BEOL options.
  • Define Reliability specifications for DRAM and Base Die through cross-functional collaboration to meet the product needs.
  • Use statistical computation/ modeling/scripting tools for data analysis.
  • Engage with Customers to support issues with current HBM architectures and identify opportunities to innovate on future HBM solutions.
  • Yield and reliability analysis, process flow and integration development, product design, and testing optimization to accelerate advanced CMOS technology qualification and mass production ramp-up.
  • Pathfinding to explore new architectures for future HBM products and make recommendations after performing a highly technical feasibility analysis.

FAQs

What is the primary responsibility of the Senior HBM Foundry Interface Design Engineer?

The primary responsibility is to provide technology support for the design and development of next-generation HBM DRAM products while collaborating closely with various engineering teams and external foundries.

What qualifications are required for this position?

A BSEE or greater and 5+ years of relevant experience in Design/Technology engineering roles are required. Experience with Foundry Technology PDKs and EDA tools, as well as a strong foundation in CMOS circuit design, is also important.

Is experience with advanced FinFET nodes necessary?

Yes, experience working with Foundry Technology PDKs, preferably advanced FinFET nodes, is preferred.

What tools and skills are encouraged for applicants?

Solid experience in automation using Python or an equivalent scripting language is highly encouraged, along with knowledge of statistical computation and modeling tools for data analysis.

Does Micron provide opportunities for professional growth?

Yes, Micron is dedicated to personal wellbeing and professional growth, offering a collaborative environment with opportunities for skills development.

What is the salary range for this position?

The estimated US base salary range for this position is $133,000.00 - $227,000.00, depending on location and other job-related factors.

Are there any specific technical skills that would be beneficial for this role?

Good understanding of Process Technology and device physics of advanced CMOS, experience with reliability verification, and familiarity with compact device and aging models would be beneficial.

What kind of teams will the selected candidate be working with?

The selected candidate will work with a highly multi-functional team of technical subject matter experts, including Design Engineering, Product Engineering, Process Development, Package Engineering, and Business Units.

What is the work environment like at Micron for this role?

The work environment is inclusive and diverse, emphasizing collaboration across multicultural teams worldwide while focusing on groundbreaking technology.

Can new graduates apply for this position?

While the role requires significant experience (5+ years), Micron is interested in candidates who are motivated to grow in technical breadth and depth, so recent graduates with relevant internships or co-op experience may still be considered.

We're accelerating the transformation of information to intelligence.

Manufacturing & Electronics
Industry
1-10
Employees
1978
Founded Year

Mission & Purpose

Micron is a world leader in innovative memory solutions that transform how the world uses information. We have approximately 40,000 team members in 17 countries who work with the world’s most trusted brands, delivering memory and storage systems for a broad range of applications and sparking countless possibilities in technology.